Recently awarded multiple coveted Global Mobile (GLOMO) Awards at Mobile World Congress Barcelona 2023, EdgeQ is a leading innovator creating the industry’s first 5G Base-Station-on-a-Chip. Led by seasoned executives from Qualcomm, Intel, and Broadcom who have delivered industry-transforming technologies (4G/5G, WiFi, Wimax, Artificial Intelligence, Cloud Servers) for the last few decades, EdgeQ is inventing a new paradigm in 5G wireless infrastructure. Our vision is to reconstitute wireless infrastructure into a fluid, cloud-based form that would extend robust internet access and communications to remote and dense areas, as well as to the next trillion of interconnected devices. EdgeQ is backed by world-renown investors, as well as luminary advisors Paul Jacobs, Matt Grob, and Ajit Pai.

Salary Range: $140-200k

Responsibilities

• Build strategic partnerships with Carrier Operators and OEMs/ODMs and own the account from pre-sales to post sales
• Business owner for particular accounts, owns pricing, onboarding of features and aligning with engineering
• Define, own and implement roadmaps of product features with in-depth knowledge of customer needs and engineering resources. Work and drive alignment with the engineering team on the planning and execution vis-a-vis corporate objectives
• Define the next generation product for EdgeQ’s growing business -- Analyze market demands and build business cases along with technology roadmap for such a product.
• Define, implement, and institute corporate wide business processes congruent with product life cycles and customer life cycles
• Inbound/Outbound support of customers and EdgeQ sales, apps engineering, and product engineering
• Monitor and analyze market trends, competition, and customer feedback to identify opportunities for product improvement and innovation.

Requirements

• A Master's or a PhD degree in engineering or related field, with an MBA preferred.
• Deep knowledge of Modem technology, including cellular network standards (5G/LTE) and wireless protocols (Wi-Fi)
• Solid understanding of Networking Stack and Protocols will be viewed as added advantage
• ~10 years of experience in product management, with at least 5 years of experience in the Telecommunication industry.
• Experience in a fast-paced startup environment is highly desired.
• Proven experience in new product introduction and scaling business.
• Track record of successful product launches and revenue growth
• Ability to manage cross-functional teams and collaborate with engineering teams in an agile environment.

Job Summary

EdgeQ is looking to add an experienced member to the product management team to develop and manage innovative semiconductor products for 5G wireless infrastructure. The role will be responsible for identifying market demands and new trends from customer engagement, instituting best business practices for the company, developing revenue-generating customer funnel, validating business cases through complex analyses of the ecosystem, technology, and competitive landscape; building strategic partnerships, and driving the complete product life cycle from cradle to grave.

Recently awarded multiple coveted Global Mobile (GLOMO) Awards at Mobile World Congress Barcelona 2023, EdgeQ is a leading innovator creating the industry’s first 5G Base-Station-on-a-Chip. Led by seasoned executives from Qualcomm, Intel, and Broadcom who have delivered industry-transforming technologies (4G/5G, WiFi, Wimax, Artificial Intelligence, Cloud Servers) for the last few decades, EdgeQ is inventing a new paradigm in 5G wireless infrastructure. Our vision is to reconstitute wireless infrastructure into a fluid, cloud-based form that would extend robust internet access and communications to remote and dense areas, as well as to the next trillion of interconnected devices. EdgeQ is backed by world-renown investors (Threshold Ventures, AME Ventures, Cisco), as well as luminary advisors Paul Jacobs, Matt Grob, and Ajit Pai.

Salary Range: $140-200k

Responsibilities

• As a member of a world-class team that has delivered multiple generations of modems to all Android and Apple mobile phones, you will be working on the ASIC design of EdgeQ’s next generation chip. You would be in the hardware systems team working on next Gen 5G Platform Architecture.
• Design the micro-Architecture of high performance and low power hardware from scratch. Work with architect and software teams.
• Design, simulation and synthesis for area/timing/power/performance specifications
• RTL implementation of wireless SoC and MAC modules from spec to tape out - Control and Datapath RTL development, Lint/CDC of RTL blocks and integration of subsystems.
• Design SoC and MAC architectures, including hardware accelerators, memory, I/Os, peripherals, and control interfaces
• Work in the front end SoC team with architects, designers and verification engineers and be responsible for the design and verification of Modem IPs and SoC.
• Work in the Physical Design Team on advanced Technology Nodes learning and owning PNR implementation (Floorplanning, Placement, CTS, post route, Timing Closure, IR Drop etc).
• RTL implementation of baseband processing modules from spec to tape out.

Requirements

• Have a professional knowledge / experience on systemverilog and C
• Have a professional knowledge on digital signal processing (e.g. Nyquist Sampling Theorem, LTI, Digital filter, Fourier transform, Z-transform, DFT/FFT, etc)
• Familiar with RTL simulator, RTL synthesis tools, gcc and python

Qualifications

• 5-10+ years in semiconductor industry
• Experience in cellular wireless communications (4G/5G) a plus
• BS or MS or PHD in Electrical Engineering. Strong digital logic design skills using FSMs, Boolean logic, arithmetic logic a plus.

At EdgeQ, our vision is a hyper-connected world achieved through implementing 5G in a format that is accessible, consumable, and intuitive. As a leading innovator, EdgeQ is the creator of the industry’s first 5G Base-Station-on-a-Chip. Led by seasoned executives who have delivered industry-transforming technologies (4G/5G, WiFi, Wimax, Artificial Intelligence, Cloud Servers) for the last few decades, EdgeQ is inventing a new paradigm within the wireless infrastructure industry.

As an engineer of the Platform Software team, you will help build a dynamic platform for the next generation 5G SoC at EdgeQ. You will be in a fast paced environment and challenged creatively as you interact with internal and external customers. Must be able to own, implement and optimize data plane stacks.

Role Summary and Responsibilities

• Identifying bottlenecks in networking and communication protocols
• Developed DPDK PMD and DPDK fast path
• Putting together DPDK on an ARMv8 embedded system
• Troubleshooting and optimizing data path
• Architect the next generation 5G base station on a chip’s data path

Job Requirements

• Strong programming experience in c/c++
• In-depth knowledge in packet forward path in layer 2 and layer 3
• Hands on experience with DPDK fastpath
• 5G RAN architecture knowledge preferred but not required
• Have good knowledge and experience working in Linux environment
• 10 years experience with DPDK preferred

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

Role Summary and Responsibilities

• Strong programming experience in c/c++
• Linux system, kernel, device driver programming experience
• Experience with VM on ARM cpus preferred

Job Requirements

• Good understanding and hands-on experience in Linux kernel memory subsystem
• Experience of development multi-core, multi-threaded application for Linux system
• Good understanding of l2/l3 networking protocol
• Linux socket programming experience
• Hands on experience on Marvell SoC

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

Role Summary and Responsibilities

Your role will include digital radio design activities such as:

• Strong programming experience in c/c++
• Linux system, kernel, device driver programming experience
• Experience with VM on ARM cpus preferred

Job Requirements

• Good understanding and hands-on experience in Linux kernel memory subsystem
• Experience of development multi-core, multi-threaded application for Linux system
• Good understanding of l2/l3 networking protocol
• Linux socket programming experience
• Hands on experience on Marvell SoC

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

Role Summary and Responsibilities

Your role will include digital radio design activities such as:

• Design and develop high quality functional software
• Develop high level design, low-level design specification
• Design SW system to handle critical timing/synchronization to meet real-time needs of a 4G/5G Radio
• Design and develop SW component tests and Radio product tests
• Closely work with radio designers and design HW-SW interfaces
• Close cooperation with CPU, FPGA and RF circuits vendors
• Functional troubleshooting at product level both in the lab and field
• Perform effective SW configuration management and SW release managment
• Support field performance activities and radio conformance tests

Job Requirements

• In-depth knowledge of radio development for mobile networks, especially on 3GPP LTE and NR
• 2-3 years Experience in 4G LTE and LTE Advanced RAN product development is a must >
• Excellent experience in L2 layer.
• Candidate should have the ability to extract relevant information from 3GPP specs for the work at hand.
• Should be having excellent C coding skills.
• Should be able to devise Unit Test and Integration Test cases for the feature at hand.
• Any prior experience on 5G Layer2 will be a plus.
• Shall be great team player
• Excellent understanding of SW development and Architecture principles
• Excellent inter-personal skills
• Excellent verbal and written communication skills
• Ability to quickly grasp and adapt to new technologies and concepts.
• B.Tech Degree in Electronics & Communication, Telecom System Engineering or Computer Science. MS/M.Tech Degree highly desirable
• At least 2+ years’ experience in mobile telecommunication industry preferably in RAN product development

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

Role Summary and Responsibilities

Your role will include digital radio design activities such as:

• Design and develop high quality functional software
• Develop high level design, low-level design specification
• Design SW system to handle critical timing/synchronization to meet real-time needs of a 4G/5G Radio
• Design and develop SW component tests and Radio product tests
• Closely work with radio designers and design HW-SW interfaces
• Close cooperation with CPU, FPGA and RF circuits vendors
• Functional troubleshooting at product level both in the lab and field
• Perform effective SW configuration management and SW release managment
• Support field performance activities and radio conformance tests

Job Requirements

• In-depth knowledge of radio development for mobile networks, especially on 3GPP LTE and NR
• 2+ years Experience in 4G LTE and LTE Advanced RAN product development
• Excellent experience in LTE L3 layers especially in Radio Resource Management and eNodeBApp
• Experience in 5G NR in L3 layers – Radio Resource Management, RRC and gNodeBApp – is a plus
• Should be excellent in C coding
• Should be able to interpret 3GPP specifications

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

Job Requirements [Sub-system DV]:

• Strong hands-on experience in C based HW (IP sub-system) verification
• Required to have familiarity and environment development experience which is UVM based (Sequences, Scoreboard)
• Must have strong knowledge on Bus protocols (AXI/AHB/APB)
• Experience with signal processing DV background is a plus
• Nice to have Network on Chip/ Interconnect debugging experience
• Functional Coverage
• Coverage analysis and closure

Job Requirements [SoC DV]:

• Hands-on SoC verification environment development and integration expertise
• Strong understanding and development experience with C based verification flows, and tests, which involves multiple processor cores
• Must have strong knowledge on Bus protocols (AXI/AHB/APB)
• Should be proficient in Verilog/ System – Verilog
• Candidates with experience integrating Verification IPs (VIPs) for protocols such as DDR, PCIe, Ethernet, USB will be preferred
• ARM / RISC V Architecture knowledge
• Gate Level Simulation flow bring up and experience (GLS)
• Knowledge of UPF would be an advantage

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

Job Requirements [Lead Design Engineer]:

• 12+ years of relevant experience
• Ability to architect a sub-system or a group of sub-systems
• Strong background in digital design/verification/timing concepts in order to analyze trade-offs between feature set, area, performance, power, software complexity, schedule, and resourcing
• Hands-on experience in:
• Modem design (Lower/ Upper Phy/ MAC), or
• Integrating Processor sub-systems and Coherent Mesh Networks, or
• Integrating High Speed Interfaces (DDR, PCIe, CXL, Ethernet, eCPRI, JESD, USB etc)
• Prior background in SoC or Chipset architecture is a strong plus
• Strong digital design background
• uArchitecture, RTL development strength – control path and datapath RTL development
• Experience with RTL integration – ability to stitch together multiple blocks into sub-system
• Experience in defining testplans, feature coverage, and driving verification closure
• Must have thorough knowledge of Lint and CDC concepts
• Must have strong understanding of design constraints and timing closure concepts
• Exposure to wireless radio technologies (Eg: 5G/4G) and design experience of signal processing blocks is a plus
• Must have working knowledge of CHI/AXI/AHB/APB protocols
• Exposure to Network on Chip Interconnects is a plus
• Experience with logic synthesis, Logic Equivalence Checks, DFT is a plus
• Should be capable of leading a dynamic team of engineers, drive project goals with quality, schedule milestones, and have milestones adherence

Job Requirements [Design Engineer]:

• 5+ years of relevant experience
• Strong digital design background
• uArchitecture, RTL development strength – control path and datapath RTL development
• Experience with RTL integration – ability to stitch together multiple blocks into sub-system
• Must have thorough knowledge of Lint and CDC concepts
• Experience in defining testplans, feature coverage, and code coverage analysis
• Strong understanding of design constraints, and timing closure concepts
• Must have working knowledge of AXI/AHB/APB protocols
• Experience with ARM processors/CMN/PCIe/CCIX/CXL/Ethernet/USB/eCPRI/JESD protocols is a plus
• Exposure to Network on Chip Interconnects is a plus

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

Role Summary and Responsibilities

• Expected to work on Block/sub-system level PD
• PD activities including floorplanning, abstract view generation, PNR, STA, EM, IR DROP, DRCs, & schematic to layout verification
• Work in collaboration with design team to address design challenges
• Continous search for improvement in RTL2GDS flow to improve PPA
• Troubleshoot a wide variety of issues, including but not limited to difficult design issues and applied proactive intervention
• Responsible for all aspects of physical design and implementation of complex 5G/AI SOC

Role Summary and Responsibilities [STA Lead Role]:

• Expected to work on Subsystem Level STA and support Fullchip STA
• Own and Drive complete subsystem Timing Closure and Signoff
• Support on Fullchip Timing Closure
• Support and develop on existing Timing Closure and Signoff Methodology
• Work with Front end team and create Block level and Subsystem level Constraints

Job Requirements:

• BE/BTECH/MTECH with strong experiencein Physical Design
• Strong understanding in the RTL2GDSII flow or design implementation in leading process technologies.
• Good understanding of the RTL2GDSII concepts related to synthesis, place & route, CTS, timing convergence, layout closure
• Expertise on high frequency design methodologies
• Good knowledge and experience in Block-level and Sub-system Floor-planning and Physical verification
• Experience with tools like Innovus/ICC2, Tempus/Primetime/etc used in the RTL2GDSII implementation
• Strong knowledge and experience in standard place and route flows (Innovus/Cadence flows preferred)
• Well versed with timing constraints, STA, and timing closure
• Good automation skills in PERL, TCL, tool specific scripting on one of the industry leading Place & Route tools
• Ability to multi-task and flexibility to work in a start-up environment
• Good communication skills and strong motivation, Strong analytical & Problem solving skills. Proficiency using Perl, Tcl, Make scripting is preferred

Job Requirements [STA Lead Role]:

• BE/BTECH/MTECH with strong experiencein Physical Design
• Strong understanding in the RTL2GDSII flow or design implementation in leading process technologies.
• Hands-on experience on SOC & Block Level timing signoff with 4+ tape outs.
• Strong knowledge on constraints development and validation.
• Strong understanding of margins/derates.
• Good Experience in Multimode Multi corner signoff closure.
• Strong Knowledge on IO Budgeting for blocks and creating Top-level and Block-level Clock Tree Targets.
• Should be able to create both clock and data timing ECOs. Manual and tool based flows.
• Experience on Cadence tools (Tempus/TSO) will be an added advantage.
• Strong TCL Scripting skills are required.

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

Role Summary and Responsibilities

• Design and develop high quality functional firmware
• Translate product requirements to FW functional requirements
• Write detailed FW architecture specification covering functional, performance and KPI aspects
• Write detailed FW architecture specification covering functional, performance and KPI aspects
• Develop high level design, low-level design specification
• Design FW system to handle critical timing/synchronization to meet real-time needs of wireless protocols
• Closely work with HW architects and system engineers to design HW-SW functional split and interfaces
• Active part in Customer solution design
• Functional troubleshooting at product level both in the lab and field
• Perform effective SW/FW configuration management and release management
• Support field performance activities and radio conformance tests

Job Requirements

• Strong knowledge of any of the wireless technologies (4G, 5G, WLAN technologies (802.11a/b/g/n/ac/ax))
• Strong background in Wireless communication and signal processing
• Deep understanding of embedded software engineering principles, and core computer science fundamentals
• RTOS, C and C++, compilers, build and source code control tools;
• Very strong coding & debugging skills in C is must
• Proficiency debugging embedded software systems
• Education & experience:B.Tech Degree in Electronics & Communication, Telecom System Engineering or Computer Science. MS/M.Tech Degree highly desirable
• 2-12 years’ experience Wireless PHY, PHY control Firmware design and development

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

EdgeQ is a leading innovator creating the industry’s first 5G Base-Station-on-a-Chip. We have assembled a formidable team of distinguished engineers, domain experts, and top graduates from the world’s most selective universities to unlock what has traditionally been a proprietary, expensive and complex solution. It takes great innovative minds to unlock the potential of 5G into transformative products. This is where you come in to be one of the key drivers of this transformation.

Role Summary and Responsibilities

• You will be part of the software team delivering high-performance software for a novel reference platform on an aggressive timeline.
• You will be part of a team delivering a custom high-performance PHY and RF modules on an aggressive timeline.
• You will be part of a team that handles design and development of complex low-level SW and FW to enable the development of air interface solutions with focus on L1, Phy and RF functions based on customer driven requirements.
• Responsibilities include developing signal processing features and algorithms using cutting edge SoC, DSP, Baseband, RF transceiver and WTR engine technologies.
• You will be contributing to the latest ideas and developments in wireless communication enabling IoT, Vehicular communication(V2X), Augmented Reality, Automated Factories of the future. Are you ready to take the plunge?

Job Requirements

• Strong background in Wireless communication and signal processing
• Very strong coding & debugging skills in C is must
• Knowledge of any of the wireless technologies (4G, 5G, WLAN technologies (802.11a/b/g/n/ac/ax)) is a plus.
• Deep understanding of embedded software engineering principles, and core computer science fundamentals
• Knowledge of RTOS, compilers, build and source code control tools will be a plus
• Education & experience:B.Tech Degree in Electronics & Communication, Telecom System Engineering or Computer Science. MS/M.Tech Degree highly desirable

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

Role Summary and Responsibilities

• Define management software solution for different RAN deployments.
• High level & detailed design of different FCAPS modules.
• Develop code along with other engineers.
• Is responsible for the delivery of modules that are owned.
• Lead and guide other junior engineers.

Job Requirements

• 8-10 years’ experience in software development and design.
• Expert in C/C++ programming.
• Good communication skills.
• Experience in network management concepts and protocols (TCP/IP, CLI, NETCONF/YANG, XML).
• Experience in Object Oriented programming.
• Experience in FCAPS module. (Performance Management, Fault Management, Configuration Management).
• Understanding of 3GPP specifications.
• Understanding of ORAN M-plane specifications.

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

Role Summary and Responsibilities

• Develop code given a high level design document.
• Responsible for the code delivery.
• Fix issues during QA/Deployment.

Job Requirements

• 4-6 years’ experience in software development and design.
• Experience in C/C++ programming.
• Good communication skills.
• Experience in network management concepts and protocols (TCP/IP, CLI, NETCONF/YANG, XML).
• Experience in Object Oriented programming.
• Experience in any of the FCAPS modules. (Performance Management, Fault Management, Configuration Management).
• Understanding of 3GPP specifications.
• Understanding of ORAN M-plane specifications.

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

Role Summary and Responsibilities

• Design and develop firmware/driver—protocol/mac of 802.11—for WIFI SOC system
• Work with Hardware team to verify hardware features and debug hardware issues

Job Requirements

• Bachelor’s degree or above in CS/EE, 2+ years embedded system software development experience
• Excellent communication and coordination capability
• Outstanding ability of C/C++ language
• Experience of embedded software development
• Good knowledge of OS and system architecture
• Good experience of Linux Driver development
• Good experience with WiFi (802.11b/g/a/n/ac) protocol
• Good experience with developing OpenWrt based Linux Kernel and support applications
• Experience of CPU architectures such as ARM is a strong plus
• Ability to understand hardware design is strong plus

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

EdgeQ is a leading innovator creating the industry’s first 5G Base-Station-on-a-Chip. We have assembled a formidable team of distinguished engineers, domain experts, and top graduates from the world’s most selective universities to unlock what has traditionally been a proprietary, expensive and complex solution. It takes great innovative minds to unlock the potential of 5G into transformative products. This is where you come in to be one of the key drivers of this transformation.

Role Summary and Responsibilities

• You now have an opportunity of joining the team which drove the 4G LTE based wireless revolution and is now best positioned to expand into new areas such as 5G NR, 6G WLAN, IoT, Vehicular communication(V2X).
• ou can work in areas as diverse as high level architecture studies, modem algorithm design, System Engineering and development, Smart Schedulers, Ultra Reliable Low Latency applications, power efficient design, verification and commercialization.
• Get in on the ground floor of these new emerging technologies and help shape the future.

Job Requirements

• Very strong coding & debugging skills in C/C++ is must.
• Strong OS and Networking concepts.
• Knowledge of any of the wireless technologies (4G, 5G, WLAN technologies (802.11a/b/g/n/ac/ax)) will be a big plus
• Deep understanding of embedded software engineering principles, and core computer science fundamentals

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

EdgeQ is a leading innovator creating the industry’s first 5G Base-Station-on-a-Chip. We have assembled a formidable team of distinguished engineers, domain experts, and top graduates from the world’s most selective universities to unlock what has traditionally been a proprietary, expensive and complex solution. It takes great innovative minds to unlock the potential of 5G into transformative products. This is where you come in to be one of the key drivers of this transformation.

Role Summary and Responsibilities

• You will be an ASIC Engineer developing world-class 5G solutions.
• You could work in the front end SoC team with architects, designers and verification engineers and will be responsible for the design and verification of Modem IPs and SoC.
• You could work in the Physical Design Team on advanced Technology Nodes learning and owning PNR implementation (Floorplanning, Placement, CTS, post route, Timing Closure, IR Drop etc).
• You could be in the hardware Systems team working on next Gen 5G Platform Architecture, Board Design or PDN.

Job Requirements

• Must be B.E/B.Tech or M.E/M.Tech or PhD in E&C or E&E domains with 0-2 years of experience. Strong digital logic design skills using FSMs, Boolean logic, arithmetic logic.
• Strong basics in microelectronics, transistors, CMOS technologies
• The successful candidate must possess passion and drive to learn on the job and should have excellent problem-solving skills. Knowledge of Wireless Communication and Digital Communication Systems is plus.

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.

At EdgeQ, our vision is a hyper-connected world achieved through implementing 5G in a format that is accessible, consumable, and intuitive. As a leading innovator, EdgeQ is the creator of the industry’s first 5G Base-Station-on-a-Chip. Led by seasoned executives who have delivered industry-transforming technologies (4G/5G, WiFi, Wimax, Artificial Intelligence, Cloud Servers) for the last few decades, EdgeQ is inventing a new paradigm within the wireless infrastructure industry.

As an engineer of the Platform Software team, you will help build a dynamic platform for the next generation 5G SoC at EdgeQ. You will be in a fast paced environment and challenged creatively as you interact with internal and external customers. Must be able to own, implement and optimize Linux kernel device drivers, RTOS firmware and Linux application stacks.

Role Responsibilities

• Develop and design Linux kernel device drivers
• Optimize driver and kernel using common Linux tools
• Troubleshoot kernel OS and device driver bugs
• Architect next generation 5G platform software
• Interface with internal and external customers to resolve critical issues

Requirements

• Have the professional knowledge/experience on C & assembly language
• Linux environment development experience
• Understanding of SPI, I2C, UART, PCIe, Ethernet device drivers
• Knowledge of Linux networking stack

Accessibility

EdgeQ is an Equal Employment Opportunity (EEO) employer and welcomes qualified applicants from around the world, regardless of their ethnicity, gender, religion, nationality, age, disability, or other legally protected status.